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Evidence-driven hardware architecture exploration

Design the hardware before it exists.

Blueprinting turns candidate compute, memory, interconnect, and system organizations into inspectable, simulatable, and comparable architecture blueprints—grounded in workload truth, versioned evidence, and explicit claim boundaries.

Shared truth
One workload semantics for every candidate
Late binding
GPU, LPU, and future targets stay comparable
Traceable
Every claim leads back to evidence and assumptions
EXPERIMENT / BP-042 REPRODUCIBLE
Architecture question Which memory and fabric choice actually moves the bottleneck?
A64 × MXU

HBM 8.0 TB/s · Scale-up mesh

2.8×feasible
B96 × MXU

HBM 5.2 TB/s · Ring fabric

1.7×bandwidth-bound

01 / Exploration loop

From an architecture question to evidence that can carry a decision.

Not parameters poured into a formula—every comparison shares semantics, constraints, evidence, and verification boundaries.

  1. 01

    Frame

    Fix the workload suite, objectives, constraints, and uncertainty.

  2. 02

    Blueprint

    Describe compute, memory, fabric, and system candidates.

  3. 03

    Map

    Derive legal parallelism, placement, schedules, and buffer plans.

  4. 04

    Simulate

    Resolve analytical, network, hardware, and measured evidence as needed.

  5. 05

    Decide

    Compare bottlenecks, sensitivity, uncertainty, and Pareto frontiers.

02 / System capabilities

Organized around hardware decisions—not one simulator.

Early models may be coarse; semantics and provenance may not. Increase fidelity as the design matures without rewriting upstream facts.

ARCHPLANNED

Candidate blueprints

Represent engines, memory hierarchy, NoC, package, node, and cluster organization.

Explore the design space →
MAPIMPLEMENTED SLICE

Workload and mapping

Conserve operations, bytes, messages, and dependencies while comparing sharding, recomputation, and scheduling.

Understand the workload model →
EVDIMPLEMENTED SLICE

Evidence and calibration

Tie every cost claim to a versioned provider, applicability domain, confidence, and observations.

Read the evidence model →
APIFOUNDATION

Agent-ready analysis surface

Stable identity, structured diagnostics, and reproducible experiments let agents propose, run, and audit explorations.

Inspect module boundaries →

03 / Formal spine

One workload truth, progressively resolving new design decisions.

Blueprinting borrows typed IRs, staged lowering, and verifiers to serve architecture modeling, derivation, and validation—not to redefine the product as a compiler.

Enter the formal analysis foundations →
  1. 01
    ModelIRmodel semantics and dataflow
    live
  2. 02
    DistributedTaskIRlogical mesh, shards, and collectives
    live
  3. 03
    PortablePlanIRexact work and target-neutral plan
    live
  4. 04
    ConcretePlanIRarchitecture binding, resources, and schedule
    contract
  5. 05
    MachineIRoptional target program realization
    contract

04 / Evidence ladder

As the design sharpens, evidence gets richer—and old conclusions remain reproducible.

L1

Analytical model

Roofline, capacity, and explainable envelopes for early pruning.

L2

Network simulation

Topology, routes, collectives, contention, and scale-out effects.

L3

Hardware simulation

Queues, resource occupancy, memory lifetimes, and cycle-level detail.

L4

Measurement and silicon

Profiler, prototype, GPU, LPU, and silicon observations create new revisions.

05 / Honest status

The target architecture and implemented capability are stated separately.

This site treats Implemented, Experimental Contract, and Planned as auditable states—not marketing language.

Read the capability matrix →
IMPLEMENTED SLICE

Transformer → PortablePlanIR

Typed workload accounting, distributed mapping, checkpoints, analytical estimates, and Calculon calibration.

NEXT MILESTONE

Two-blueprint exploration

Compare two parameterized virtual architectures with resource simulation, bottleneck, and utilization results.

BLUEPRINT / SIMULATE / EXPLAIN

Make the architecture falsifiable before making it silicon.